GitLab

Fix sorting memory 512b interface

See merge request franss/wupper!9

Added some functionality to wupper-dma-transfer (compare buffers in loopback) and use best tlp size for FromHost transfers rather than 32 byte as default

Update doc

See merge request franss/wupper!8

Removed obsolete tools, adapted wupper-dma-transfer and wupper-dump-blocks to...

See merge request franss/wupper!7

Removed obsolete tools, adapted wupper-dma-transfer and wupper-dump-blocks to use new LOOPBACK register

Fixed WupperCard and compatibility with new driver features

See merge request franss/wupper!6

Added unconstrained pins for XUPP3R_VU9P

See merge request franss/wupper!4

Fixed build script in case there are no IP cores (only block designs) and...

See merge request franss/wupper!3

Fixed build script for XUPP3R_VU9P

See merge request franss/wupper!2

Fixed build script in case there are no IP cores (only block designs) and added clk_wiz_regmap ip core for Versal

Updated Wupper to the version used in CERN/ATLAS/FELIX phase2

See merge request franss/wupper!1

* Updated wupper for Vivado 2018.1
* Byte enable on registermap is now supported
* Fixed i2c mux reset (inversion) on VC709 board
* Regmap is now running on 25 MHz for better timing, this was 41.6 MHz
* registers can now be disabled at build time using the generate statement in the .yaml file



git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@46 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63

git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@45 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63

git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@44 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63

git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@43 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63

git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@42 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63

git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@41 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63

git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@40 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63

git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@39 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63

git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@38 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63

* Added WupperCodeGen, a tool to generate the registermap vhdl, c++ and latex doc from a single .YAML file
* Fixed bug: crash when polling enable bits while transferring DMA in two directions at the same time
* Code cleanup
* Updated documentation with WupperCodeGen



git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@37 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63

git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@36 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63

 * PCIe lock when reading registers on a high frequency
 * Added threshold registers for Prog Full of the FromHost fifo
 * Code cleanup



git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@35 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63

 * Wrong TLP length reported on register writes
 * Two simultaneous interrupts were not handled
 * XADC wizard for ultrascale devices

Added:
 * Added voltage (int, aux, bram) readout on XADC wizards



git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@34 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63

  -- supportedtools.tex, again to test the OC repo


git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@33 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63