- 29 Sep, 2021 5 commits
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Frans Schreuder authored
Fix sorting memory 512b interface See merge request franss/wupper!9
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Frans Schreuder authored
Added some functionality to wupper-dma-transfer (compare buffers in loopback) and use best tlp size for FromHost transfers rather than 32 byte as default
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Frans Schreuder authored
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Frans Schreuder authored
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Frans Schreuder authored
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- 28 Sep, 2021 1 commit
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Frans Schreuder authored
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- 27 Sep, 2021 6 commits
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Frans Schreuder authored
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Frans Schreuder authored
Update doc See merge request franss/wupper!8
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Frans Schreuder authored
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Frans Schreuder authored
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Frans Schreuder authored
Removed obsolete tools, adapted wupper-dma-transfer and wupper-dump-blocks to... See merge request franss/wupper!7
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Frans Schreuder authored
Removed obsolete tools, adapted wupper-dma-transfer and wupper-dump-blocks to use new LOOPBACK register
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- 24 Sep, 2021 3 commits
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Frans Schreuder authored
Fixed WupperCard and compatibility with new driver features See merge request franss/wupper!6
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Frans Schreuder authored
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Frans Schreuder authored
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- 10 Sep, 2021 11 commits
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Frans Schreuder authored
Added unconstrained pins for XUPP3R_VU9P See merge request franss/wupper!4
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Frans Schreuder authored
Fixed build script in case there are no IP cores (only block designs) and... See merge request franss/wupper!3
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Frans Schreuder authored
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Frans Schreuder authored
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Frans Schreuder authored
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Frans Schreuder authored
Fixed build script for XUPP3R_VU9P See merge request franss/wupper!2
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Frans Schreuder authored
Fixed build script in case there are no IP cores (only block designs) and added clk_wiz_regmap ip core for Versal
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Frans Schreuder authored
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Frans Schreuder authored
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Frans Schreuder authored
Updated Wupper to the version used in CERN/ATLAS/FELIX phase2 See merge request franss/wupper!1
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Frans Schreuder authored
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- 17 May, 2019 1 commit
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fransschreuder authored
* Updated wupper for Vivado 2018.1 * Byte enable on registermap is now supported * Fixed i2c mux reset (inversion) on VC709 board * Regmap is now running on 25 MHz for better timing, this was 41.6 MHz * registers can now be disabled at build time using the generate statement in the .yaml file git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@46 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63
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- 23 Apr, 2019 1 commit
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fransschreuder authored
git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@45 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63
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- 25 Jan, 2019 2 commits
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aborga authored
git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@44 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63
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aborga authored
git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@43 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63
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- 14 Feb, 2018 1 commit
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fransschreuder authored
git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@42 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63
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- 06 Nov, 2017 2 commits
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broel authored
git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@41 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63
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broel authored
git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@40 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63
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- 02 Nov, 2017 1 commit
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broel authored
git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@39 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63
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- 25 Oct, 2017 1 commit
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broel authored
git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@38 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63
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- 24 Oct, 2017 1 commit
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fransschreuder authored
* Added WupperCodeGen, a tool to generate the registermap vhdl, c++ and latex doc from a single .YAML file * Fixed bug: crash when polling enable bits while transferring DMA in two directions at the same time * Code cleanup * Updated documentation with WupperCodeGen git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@37 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63
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- 23 Nov, 2016 1 commit
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fransschreuder authored
git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@36 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63
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- 30 Sep, 2016 1 commit
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fransschreuder authored
* PCIe lock when reading registers on a high frequency * Added threshold registers for Prog Full of the FromHost fifo * Code cleanup git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@35 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63
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- 16 Jun, 2016 1 commit
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fransschreuder authored
* Wrong TLP length reported on register writes * Two simultaneous interrupts were not handled * XADC wizard for ultrascale devices Added: * Added voltage (int, aux, bram) readout on XADC wizards git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@34 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63
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- 02 May, 2016 1 commit
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aborga authored
-- supportedtools.tex, again to test the OC repo git-svn-id: https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk@33 40b9b6cb-b4b1-4917-8f69-d85fb9b73f63
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